Two of the world’s leading memory manufacturers have introduced the first technical specification for High Bandwidth Flash (HBF), a new memory design intended to improve how AI chips handle data access. Published through the Open Compute Project (OCP), the document offers data center developers a reference for early testing and development.
SanDisk and SK hynix started working together on the High Bandwidth Flash (HBF) standard in 2025 to create a memory solution that combines the high capacity of NAND flash with the bandwidth advantages of High Bandwidth Memory (HBM). The publication of the specification turns the concept into a documented standard ready for industry evaluation.
The High Bandwidth Flash (HBF) specification has been published through the Open Compute Project (OCP), making it openly available for use in custom server and data center designs. SanDisk and SK hynix were the main developers, while companies such as Google and Tenstorrent contributed technical expertise and participated in validating the standard.
The document provides the technical framework needed to support HBF in servers and data centers, including interface definitions, electrical requirements, and hardware integration guidelines. It also covers expected performance levels, the xPU-HBF host interface, reliability and packaging standards for HBF die stacks, and software instructions for read and write functions.
At the chip level, HBF supports vertical stacking of up to eight memory layers, allowing for a theoretical maximum capacity of 4TB per chip.
SanDisk and SK hynix selected the Open Compute Project (OCP) to position HBF as a widely adopted standard in the fast-growing AI memory market. The companies expect interest from early adopters, despite the current challenges facing the semiconductor sector.
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